Digital Logic Gate Challenge
LOGIC SEQUENCE INTERFACE
Input binary signal (0 or 1) to validate the current logic circuit.
Level 1: The Inverter
Set the single input bit (A) to turn the light ON. The circuit uses a **NOT** gate.
Circuit Structure: NOT(A) -> Output
Digital Logic Hint Guide (Truth Tables)
AND Gate
| A | B | Output (A · B) |
|---|
| 0 | 0 | 0 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
OR Gate
| A | B | Output (A + B) |
|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 1 |
XOR Gate (Exclusive OR)
| A | B | Output (A ⊕ B) |
|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
NAND Gate (NOT AND)
| A | B | Output (A · B)' |
|---|
| 0 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
XNOR Gate (Equivalence)
| A | B | Output (A ⊙ B) |
|---|
| 0 | 0 | 1 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |